DEMYSTIFYING IOT SECURITY 🗓

— understanding IoT security, the BIG opportunity, IoT uniqueness and challenges

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Webinar Date: July 9, 2020 7PM
Speaker: Sunil Cheruvu, Chief IoT Security Architect, Internet of Things Group, Intel Corporation
Location: on the Web
Cost: none
RSVP:
Event Details & Registration: IEEE

Summary:
Join us for understanding the IoT security, the BIG opportunity, IoT uniqueness and challenges. Delve into the current state of IOT security, breaches, attack surfaces, and emerging use case scenarios. Let’s get acquainted with IoT security related legislations and policy landscape. Conclude with looking into future and Call to action.

Speaker:
Sunil Cheruvu is the Chief IoT security architect in the Internet of Things Group at Intel Corporation and leads the IoT security architecture global team. His team is chartered with innovating and developing security solutions to help mitigate the IoT unique threats (Cyber and Cyber-physical systems) across all the market domains including Military/Aerospace/Govt., Retail, Industrial, and Vision. Sunil is the lead author of the book: Demystifying Internet of Things Security – Successful IoT Device/Edge and Platform Security Deployment.

HOW TO BE AN EFFECTIVE IEEE VOLUNTEER (VTOOLS, CLE, VOLT, ILN & COLLABRATEC) TRAINING 🗓

— If you an Section/Chapter/Affinity/SIG/Council Officer or aspire to be one, this training is a MUST for you!!!

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Webinar Date: July 8, 2020
Time: 6:00PM
Location: on the Web

Event Details: IEEE

Summary:
This IEEE volunteer tools (vtools) site [http://http://sites.ieee.org/vtools/] provides information on a wide range of tools developed by volunteers for IEEE members and IEEE volunteers. The toolbox simplifies organizational efforts and administration by offering web-based software in order to reduce time spent on managing local activities and to assist in member development.

JOBS! JOBS! – Kulicke and Soffa, a robotics automation company looking to hire both an EE and an EE Manager 🗓

— Santa Ana Office. TELL A FRIEND

Kulicke and Soffa, a robotics automation company developing products for the semiconductor industry is looking to hire both an EE and an EE Manager in its office in Santa Ana, CA
Employment Opportunity Information: Find Job
or Leslie Peoples (lpeoples@kns.com) Senior Advisor, Talent Acquisition

Summary:
Kulicke & Soffa is a leading provider of semiconductor packaging and electronic assembly solutions supporting the global automotive, consumer, communications, computing and industrial segments. We are looking for a bright Electrical Engineer with strong design and development skills and a passion for complex systems. You will be challenged to explore a lot of areas within technology and gain A Bachelor’s or Master’s Degree in Electrical Engineering.

+5 years working experience in digital control and analog interface circuitry design (+3 years for Masters).

Experienced in DSP, FPGA digital circuit design with A/D, D/A analog interface consisting of op-amp, filters and MOSFET drivers.

Extensive experience with FPGA programming in VHDL or Verilog. DSP programming experience is a plus.

Experience in motor drive electronic hardware design for voice coils, servo motors, stepper motors.

Knowledge on high power PWM circuit.

Knowledge on VME, PCIe, RS485, Ethernet, LVDS, and Serdes is a plus.

Knowledge of machine level electrical system architecture design is a plus.

Motor Acceleration Studies 🗓

— Automated Motor Start & Result Analysis

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Webinar Date: July 8, 2020 9AM – 10AM

Location: on the Web
Cost: none
RSVP:
Event Details & Registration: IEEE

Summary:
Motor acceleration studies are essential to determine the impact of motor starting on the electrical system, and evaluate whether it’s starting as expected.

This webinar will feature ETAP’s Motor Starting Analysis module and demonstrate how to:

Ensure motor starts despite voltage drop
Ensure voltage drop will not disrupt other loads
Ensure motor feeders are sized adequately
Determine maximum motor size that can be started across the line
Utilize Automated Motor Start and Result Analyzer – New in ETAP 20

eMTCoSim™ – Cosimulation of Electromagnetic & Phasor Transients 🗓

— accurate and detailed Phasor (RMS) and Electromagnetic transients (EMT) co-simulation

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Webinar Date: June 17, 2020 9AM – 10AM

Location: on the Web
Cost: none
RSVP:
Event Details & Registration: IEEE

Summary:
ETAP eMTCoSim provides an accurate and detailed Phasor (RMS) and Electromagnetic transients (EMT) co-simulation study mode. ETAP’s Transient Stability program and a dedicated ETAP eMTP software powered by PSCAD are combined to collectively solve large, complex, and multi-disciplinary system models with higher fidelity.

This webinar will cover and demonstrate the following:

Simulation of ETAP model in multiple electrical domains (RMS & EMT)
Co-simulation between ETAP Transient Stability and ETAP eMTP
Accurate and detailed EMT models running within an extensive ETAP system
Live graphs of both Transient Stability and EMT simulations signals

People Analytics – Artificial Intelligence Data – Transformation 🗓

— Cheryl Christensen of https://data2develop.com/

IEEE Consultant Network Seattle.
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Webinar Date: June 23, 2020 7PM

Location: on the Web
Cost: none
RSVP:
Event Details & Registration: IEEE

Summary:
Cheryl Christensen of https://data2develop.com/

Cheryl Christensen will be speaking on People Analytics Data and Artificial Intelligence. An expert from Harvard Business School she will provide insights on how consultant firms can use People Analytics which include data and artificial intelligence in today’s rapid changing tech environment.

Next-Generation Chip and System Solutions 🗓

— Distinguished Lecturer Prof. Makoto Nagata of Kobe University,

IEEE SSCS Oregon Chapter June Meeting and Seminar
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Webinar Date: June 19, 2020 6PM

Location: on the Web
Cost: none
RSVP:
Event Details & Registration: IEEE

Summary:
Distinguished Lecturer Prof. Makoto Nagata of Kobe University

Interactions of IC chips and packaging structures differentiate the electronic performance of power delivery networks (PDNs) in traditional 2D and advanced 2.5D and 3D technologies. This presentation discusses their impacts on signal integrity (SI), power integrity (PI), electromagnetic compatibility (EMC) and electrostatic discharge protection (ESD), through in-depth Si experiments with in-place noise measurements and full-chip level noise simulations. Test vehicles under study are given in traditional 2D face up and flip chip packaging, 2.5D fan-out wafer level packaging (FOWLP), and 3D chip stacking with through silicon vias (TSVs).

HETEROGENEOUS INTEGRATION FOR HIGH-PERFORMANCE COMPUTING AND DATA CENTERS 🗓

— Dale of IBM Systems and Kanad of State University of New York, Binghamton

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Webinar Date: June 18, 2020 8AM – 9AM

Location: on the Web
Cost: none
RSVP:
Event Details & Registration: IEEE

Summary:
Dale of IBM Systems and a member of the IBM Academy of Technology
Kanad of State University of New York, Binghamton

The High Performance Computing and Data Center chapter of the Heterogeneous Integration Roadmap presents the clear need for heterogeneous system integration that realizes systems-in-a-package (SiPs) that target the HPC and data center markets. The potential solutions and short-term, medium-term and longer-term challenges that are encountered in realizing these SiPs are addressed. Although, as in the past, the processor-memory performance gap remains a key driver for the overall system architecture, new factors that drive the need for heterogeneous integration in the HPC and data center markets have been emerging. These factors include technology limitations, new and emerging applications, and scaling needs for surmounting power dissipation, power delivery and package IO constraints.