Adaptive and Resilient Circuits for Improving Processor Performance, Energy Efficiency, and Yield πŸ—“

— Negative impact of these variations on processor performance, energy efficiency, and yield.

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Meeting Date: November 7, 2018
Time: 10:00AM Networking; 10:15 PM Presentation
Speaker: Keith Bowman
Location: San Diego
Cost: none
RSVP: requested, through website
Event Details: IEEE vTools

Summary: Dynamic device, circuit, and system parameter variations degrade processor performance, energy efficiency, and yield across all market segments, ranging from small embedded cores in an Internet of Things (IoT) device to large CPUs in multicore servers. This seminar introduces the primary variations during the processor operational lifetime, including supply voltage droops, temperature changes, transistor aging, and workload fluctuations. This presentation then describes the negative impact of these variations on processor performance, energy efficiency, and yield. The wide dynamic voltage-frequency scaling (DVFS) range in today’s processors increases these effects. For future IoT edge processors, the low-cost packaging, voltage regulation with time-varying energy harvesters, wide temperature range, and long-lifetime requirements exacerbate these problems further. To mitigate the adverse effects from dynamic variations, this seminar presents adaptive and resilient circuits while highlighting the key design trade-offs and testing implications for product deployment.

Bio: Keith Bowman