IEEE Heterogeneous Integration Roadmap Symposium (HIRS) 🗓 🗺

— subsystem integration, Moore’s Law advances, release of v1.0, working group overviews, breakout sessions …

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Conference Meeting
SEMI Hdqtrs, Silicon Valley Map

register Sponsors: IEEE-SCV EPS, EDS and Photonics Chapters; SEMI Int’l; ASME SF Section
Meeting Dates: February 21-22, 2019 (attend either, or both)
Time: 8:30 AM – 6:00 PM (PT)
Speakers: Chairs of Working Groups (from Intel, Boeing, Fraunhofer, NASA, Infineon, ASE, ITRI, SEMI, more)
Location: SEMI International Headquarters, Silicon Valley, CA
Cost: $25 IEEE members, $40 non-members ($10 more, after Feb 8)
RSVP: requested, through website
Event Details: www.cpmt.org/scv
Summary: Heterogeneous Integration will be the key technology direction going forward, for device and subsystem integration. It is the “low hanging fruit” for initiating a new era of technological and scientific advances to continue and complement the progression of Moore’s Law scaling into the distant future. Day 1: Introduction to HIR v1.0: — Release of HIR version 1.0: How to Download and Use the Roadmap; — Presentations from HIR Technical Working Group chairs. Day 2: TWG Breakout Sessions for HIR v2.0 — Working Group Caucus & Cross-Group meetings. Come for either or both days. Corporate sponsorships/exhibits available.
Visit website for full listing of Working Group talks, Keynote, etc.