Emerging Memories and Pathfinding for the Era of Sub-10nm System-on-Chip ๐Ÿ—“

— presentation overviews these emerging memories

Meeting
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Meeting Date: August 8, 2019
Time: 3PM – 4:30PM
Speaker: Seung Kang
Location: San Diego, California
Cost: none
RSVP: requested, through website
Event Details: IEEE vTools

Summary:
A semiconductor memory is a ubiquitous component of all electronic systems, coupled with a microprocessor for computing or integrated to store information. As the semiconductor ecosystem expands to such areas like mobile computing, artificial intelligence (AI), Big Data, Internet-of-Things (IOT), life science and healthcare applications, the prevalence of these markets largely depend on memory innovations. This has propelled increasing efforts in researching, developing, and commercializing emerging memory technologies, such as PCM (phase-change memory, or PRAM), MRAM (magnetoresistive RAM), RRAM (resistive RAM), and FRAM (ferroelectric RAM). This presentation overviews these emerging memories from the perspectives of device, design, integration, and application. Also covered is the prospect of embedding these memories into advanced integrated circuits. By far, all emerging memory prototypes and products are built upon relatively mature CMOS technologies such as 22nm and 28nm. For the applications that have traditionally relied on embedded Flash, these nodes are still advanced, and such memories can serve IOT, security, automotive, and some machine learning applications competitively. However, emerging memories have not entered the domain of advanced logic nodes (7nm already in production) and have yet to be proven as a sustainable technology for pervasive applications. This transition necessitates the memory attributes that must go beyond the specifications of present product offerings. A key challenge is to achieve a combination of high speed and high endurance for high-density arrays compatible with sub-10nm CMOS devices. This requires deeply scaled memory elements with fast switching at low current and high dielectric barrier reliability. Efforts are also desired for custom memories which can be tailored in various densities and form factors for heterogeneously partitioned systems.

Bio: Seung Kang is a recognized semiconductor technologist who has driven holistic system-centric innovations of device, circuit design, and chip architecture. He built and led an advanced memory team at Qualcomm who pioneered embedded STT-MRAM and delivered the industry-first product prototype IP for IOT and wearables. He currently leads a team for developing standard cell architecture, circuit, and co-optimization methodology for Qualcommโ€™s flagship mobile SOCs. Before joining Qualcomm, he had worked on CMOS process technology and reliability at the Bell Laboratories of Lucent Technologies. He received Ph.D. from U.C. Berkeley and both B.S. and M.S. from Seoul National University, Korea. Dr. Kang has published more than 100 papers and given over 70 keynote and invited speeches at international conferences and colloquiums. He served as Distinguished Lecturer for the IEEE Electron Device Society from 2014 to 2018 and as Visiting Professor at the Center for Innovative Integrated Electronic Systems of Tohoku University. He holds over 200 granted US patents.