POSTPONED UNTIL FURTHER NOTICE–Transceiver Architectures for Beyond-5G: Challenges and R&D Opportunities 🗓

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Meeting Date: March3, 2020
Time: 10:00 AM Presentation
Speaker: Payam Heydari
Location: San Diego
Cost: none
RSVP: requested, through website
Event Details: IEEE vTools

Summary:
The ongoing super-linear growth of world’s population coupled with the worldwide access to internet and the general public’s tendency to use more bandwidth-intensive applications fuel the urgency to enhance wireless infrastructures so as to meet these demands. Consequently, the wireless R&D is headed towards the inception of “Beyond-5G” (e.g., 6G) technology. This webinar provides a comprehensive overview of challenges and opportunities in designing beyond-5G transceiver architectures capable of achieving high data rates above and beyond 20 Gbps.

Bio:
Payam Heydari received his Ph.D. degree from the University of Southern California in 2001. He is currently a Full Professor of Electrical Engineering at the University of California, Irvine. Dr. Heydari’s research covers the design of terahertz/millimeter-wave/RF and analog integrated circuits. He is the (co)-author of two books, one book chapter, and more than 150 journal and conference papers. He has given Keynote Speech to IEEE GlobalSIP 2013 Symposium on Millimeter Wave Imaging and Communications, served as Invited Distinguished Speaker to the 2014 IEEE Midwest Symposium on Circuits and Systems, and gave a Tutorial at the 2017 International Solid-State Circuits Conference (ISSCC). He was a Distinguished Lecturer of the IEEE Solid-State Circuits Society (2014-2015), and is now a Distinguished Microwave Lecturer of the IEEE Microwave Theory and Techniques Society (2019-2022). His group was among the first who introduced the design of millimeter-wave integrated circuits in silicon technologies. They demonstrated the world’s first fundamental frequency CMOS transceiver operating above 200 GHz, the world’s highest radiated power and highest efficiency sub-terahertz circularly-polarized radiator in silicon employing a multi-port cavity-backed structure.