Past Meetings/Webinars

DEMYSTIFYING IOT SECURITY πŸ—“

— understanding IoT security, the BIG opportunity, IoT uniqueness and challenges

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Webinar Date: July 9, 2020 7PM
Speaker: Sunil Cheruvu, Chief IoT Security Architect, Internet of Things Group, Intel Corporation
Location: on the Web
Cost: none
RSVP:
Event Details & Registration: IEEE

Summary:
Join us for understanding the IoT security, the BIG opportunity, IoT uniqueness and challenges. Delve into the current state of IOT security, breaches, attack surfaces, and emerging use case scenarios. Let’s get acquainted with IoT security related legislations and policy landscape. Conclude with looking into future and Call to action.

Speaker:
Sunil Cheruvu is the Chief IoT security architect in the Internet of Things Group at Intel Corporation and leads the IoT security architecture global team. His team is chartered with innovating and developing security solutions to help mitigate the IoT unique threats (Cyber and Cyber-physical systems) across all the market domains including Military/Aerospace/Govt., Retail, Industrial, and Vision. Sunil is the lead author of the book: Demystifying Internet of Things Security – Successful IoT Device/Edge and Platform Security Deployment.

ADDING A NEW SENSING DIMENSION TO SOFT ELECTRONICS: FROM THE SKIN TO BELOW THE SKIN πŸ—“

—IEEE EPS SOCIETY SAN DIEGO

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Webinar Date: July 22, 2020
Time: 6 PM
Speaker: Dr. Sheng Xu, Department of Nanoengineering at UC San Diego
Location: on the Web
Event Details: IEEE

Summary:
Soft electronic devices that can acquire vital signs from the human body represent an important trend for healthcare. Combined strategies of materials design and advanced microfabrication allow the integration of a variety of components and devices on a stretchable platform, resulting in functional systems with minimal constraints on the human body. In this presentation, I will demonstrate a wearable multichannel patch that can sense a collection of signals from the human skin in a wireless mode. Additionally, integrating high-performance ultrasonic transducers on the stretchable platform adds a new third dimension to the detection range of conventional soft electronics. Ultrasound waves can penetrate the skin and noninvasively capture dynamic events in deep tissues, such as blood pressure and blood flow waveforms in central arteries and veins. This stretchable platform holds profound implications for a wide range of applications in consumer electronics, sports medicine, defense, and clinical practices.

AEROSPACE CYBER PHYSICAL AND AUTONOMOUS SYSTEMS – πŸ—“

–DISTINGUISHED LECTURE

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Webinar Date: July 22, 2020
Time: 6 PM
Speaker: Prof. Roberto Sabatini of RMIT University (Melbourne)
Location: on the Web
AESS Chapter Meeting. Virtual Meeting Registration open to all IEEE chapters and sections to co-host and serve their local membership and the public.
Event Details: IEEE

Summary:
Advances in aerospace Cyber-Physical Systems (CPS) are accelerating the introduction of automated decision making functionalities and the progressive transition to trusted autonomous operations both in civil and military applications. Major benefits of these capabilities include de-crewing of flight decks and ground control centres, as well as the safe and efficient operations of air and space platforms in a shared, unsegregated environment. In the commercial aviation context, CPS are supporting the development of single-pilot operated aircraft, with the co-pilot potentially replaced by a digital assistant and/or a remote pilot on the ground. A single remote pilot on the ground, on the other hand, will no longer be restricted to controlling a single aircraft and instead will be allowed to control multiple manned and unmanned vehicles, in line with the so-called One-to-Many (OTM) operational concept.

BUILDING THE ROBOTIS OPEN MANIPULATOR – AN EXPERIENCE REPORT πŸ—“

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Webinar Date: July 13, 2020
Time: 6:30 PM

Location: on the Web
A Zoom invite will be sent out to all registered by 4:00 pm on the meeting date. You must be registered to get the invite.
Event Details: IEEE

Summary:
This will be an informal meeting focused on the experience three of us had building the Robotis Open Manipulator. ROS 2 runing on X86 and Raspberry Pi where the software targets. The OpenCR and U2D2 where the hardware controller targets.

HIGH-SPEED CMOS SERIAL TRANSMITTERS FOR 56-112GB/S ELECTRICAL INTERCONNECTS πŸ—“

–the design of a 56-Gb/s PAM4 transmitter designed in 14nm FinFET CMOS

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Webinar Date: July 10, 2020
Time: 10:00 AM
Speaker: Timothy Dickson, IBM Watson Research Center
Location: on the Web

Event Details: IEEE

Speaker:
Timothy (Tod) Dickson received the B.S. and M.Eng. degrees at the University of Florida, and the Ph.D. degree at the University of Toronto. Since 2006, he has been with the IBM T.J. Watson Research Center in Yorktown Heights, NY. He currently leads research projects investigating high-speed power-efficient I/O solutions for electrical and optical wireline communication links. He is also an Adjunct Professor at Columbia University in New York, NY, where he teaches graduate courses in analog and mixed-signal circuit design. He has received numerous best paper awards, including the IEEE Journal of Solid-State Circuits Best Paper Award in 2009, and the IEEE Custom Integrated Circuits Conference (CICC) Best Paper Award in 2015. He is an Associate Editor for the IEEE Solid State Circuits Letters, and serves on the Technical Programming Committee of the IEEE CICC where he currently chairs the wireline circuits subcommittee. He is a Senior Member of the IEEE, and a Solid State Circuits Society Distinguished Lecturer for 2019-2020.

Summary:
Data rates in high-speed wireline communication links continue to increase, fueled by demands in data center and high-performance computing applications. In recent years, serial link data rates have increased from 28Gb/s to 56Gb/s, with 112Gb/s rapidly approaching. To achieve these higher data rates across high-loss electrical channels, standards are switching from NRZ to PAM4 signaling. In this talk, we will start with an overview of serial transmitter architectures focusing on feed-forward equalization (FFE) techniques as well as power considerations for PAM4 links. Next, we will look at the design of a 56-Gb/s PAM4 transmitter designed in 14nm FinFET CMOS technology with a fractionally-spaced FFE. Finally, we will look at directions for 112Gb/s and discuss the design of a 112-Gb/s PAM4 transmitter in 14nm FinFET CMOS technology with precise equalization control to minimize intersymbol interference in PAM4 links.

HOW TO BE AN EFFECTIVE IEEE VOLUNTEER (VTOOLS, CLE, VOLT, ILN & COLLABRATEC) TRAINING πŸ—“

— If you an Section/Chapter/Affinity/SIG/Council Officer or aspire to be one, this training is a MUST for you!!!

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Webinar Date: July 8, 2020
Time: 6:00PM
Location: on the Web

Event Details: IEEE

Summary:
This IEEE volunteer tools (vtools) site [http://http://sites.ieee.org/vtools/] provides information on a wide range of tools developed by volunteers for IEEE members and IEEE volunteers. The toolbox simplifies organizational efforts and administration by offering web-based software in order to reduce time spent on managing local activities and to assist in member development.

JOBS! JOBS! – Kulicke and Soffa, a robotics automation company looking to hire both an EE and an EE Manager πŸ—“

— Santa Ana Office. TELL A FRIEND

Kulicke and Soffa, a robotics automation company developing products for the semiconductor industry is looking to hire both an EE and an EE Manager in its office in Santa Ana, CA
Employment Opportunity Information: Find Job
or Leslie Peoples (lpeoples@kns.com) Senior Advisor, Talent Acquisition

Summary:
Kulicke & Soffa is a leading provider of semiconductor packaging and electronic assembly solutions supporting the global automotive, consumer, communications, computing and industrial segments. We are looking for a bright Electrical Engineer with strong design and development skills and a passion for complex systems. You will be challenged to explore a lot of areas within technology and gain A Bachelor’s or Master’s Degree in Electrical Engineering.

+5 years working experience in digital control and analog interface circuitry design (+3 years for Masters).

Experienced in DSP, FPGA digital circuit design with A/D, D/A analog interface consisting of op-amp, filters and MOSFET drivers.

Extensive experience with FPGA programming in VHDL or Verilog. DSP programming experience is a plus.

Experience in motor drive electronic hardware design for voice coils, servo motors, stepper motors.

Knowledge on high power PWM circuit.

Knowledge on VME, PCIe, RS485, Ethernet, LVDS, and Serdes is a plus.

Knowledge of machine level electrical system architecture design is a plus.

Motor Acceleration Studies πŸ—“

— Automated Motor Start & Result Analysis

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Webinar Date: July 8, 2020 9AM – 10AM

Location: on the Web
Cost: none
RSVP:
Event Details & Registration: IEEE

Summary:
Motor acceleration studies are essential to determine the impact of motor starting on the electrical system, and evaluate whether it’s starting as expected.

This webinar will feature ETAP’s Motor Starting Analysis module and demonstrate how to:

Ensure motor starts despite voltage drop
Ensure voltage drop will not disrupt other loads
Ensure motor feeders are sized adequately
Determine maximum motor size that can be started across the line
Utilize Automated Motor Start and Result Analyzer – New in ETAP 20